Institute of Microelectronic Systems

Publications Archive - IMS Database

Publications of the Institute of Microelectronic Systems

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Showing results 521 - 540 out of 587

2007

On the design of scalable massively parallel CRC circuits. / Septinus, Konstantin; Le, Thuyen; Mayer, Ulrich et al.
ICECS 2007 : 14th IEEE International Conference on Electronics, Circuits and Systems. 2007. p. 142-145 4510950 (Proceedings of the IEEE International Conference on Electronics, Circuits, and Systems).

Research output: Chapter in book/report/conference proceeding › Conference contribution › Research › peer review

CMCal - an accurate analytical approach for the analysis of process variations with non-gaussian parameters and nonlinear functions. / Zhang, M.; Olbrich, Markus; Seider, D. et al.
2007. 243-248.

Research output: Contribution to conference › Paper › Research › peer review

2006

A highly parallel sub-pel accurate motion estimator for H.264. / Fluegel, Sebastian; Klussmann, Heiko; Pirsch, Peter et al.
2006 IEEE 8th Workshop on Multimedia Signal Processing, MMSP 2006. IEEE Computer Society, 2006. p. 387-390 4064586 (2006 IEEE 8th Workshop on Multimedia Signal Processing, MMSP 2006).

Research output: Chapter in book/report/conference proceeding › Conference contribution › Research › peer review

RL-Analysis of Meander Shaped Adjustment Modules. / Jambor, Thomas; Olbrich, Markus; Barke, Erich et al.
2006. Paper presented at 10th IEEE Workshop on Signal Propagation on Interconnects.

Research output: Contribution to conference › Paper › Research › peer review

Design and analysis of matching circuit architectures for a closest match lookup. / Kupzog, F.; McLaughlin, K.; Sezer, S. et al.
Proceedings of the Advanced International Conference on Telecommunications and International Conference on Internet and Web Applications and Services, AICT/ICIW'06. 2006.

Research output: Chapter in book/report/conference proceeding › Conference contribution › Research › peer review

SRAM memory cell and method for compensating a leakage current for it. / Martelloni, Yannick (Inventor); Nirschl, Thomas (Inventor); Wicht, Bernhard (Inventor).
Patent No.: CN1717747. Jan 04, 2006.

Research output: Patent

Modeling lateral parasitic transistors in smart power ICs. / Oehmen, Joerg; Olbrich, Markus; Hedrich, Lars et al.
In: IEEE Transactions on Device and Materials Reliability, Vol. 6, No. 3, 1717490, 09.2006, p. 408-420.

Research output: Contribution to journal › Article › Research › peer review

Global routing for force directed placement. / Ohlendorf, Ole; Olbrich, Markus; Barke, Erich.
Proceedings - 10th IEEE Workshop on Signal Propagation on Interconnects, SPI 2006. Institute of Electrical and Electronics Engineers Inc., 2006. p. 25-28 4069393 (Proceedings - 10th IEEE Workshop on Signal Propagation on Interconnects, SPI 2006).

Research output: Chapter in book/report/conference proceeding › Conference contribution › Research › peer review

Application of global loops on ULSI routing for DfY. / Panitz, P.; Olbrich, M.; Koehl, J. et al.
2006 IEEE International Conference on Integrated Circuit Design and Technology, ICICDT'06. IEEE Computer Society, 2006. 1669409.

Research output: Chapter in book/report/conference proceeding › Conference contribution › Research › peer review

Hochqualitative Bewegungsschätzung unter Verwendung von Meta-Bildinformationen. / Von Livonius, Jörg; Blume, Holger Christoph; Noll, Tobias G.
In: FKT, Vol. 2006, No. 1-2, 2006, p. 19-24.

Research output: Contribution to journal › Article › Research

A fast and accurate Monte Carlo method for interconnect variation. / Zhang, M.; Olbrich, M.; Kinzelbach, H. et al.
2006 IEEE International Conference on Integrated Circuit Design and Technology, ICICDT'06. IEEE Computer Society, 2006. 1669415.

Research output: Chapter in book/report/conference proceeding › Conference contribution › Research › peer review

2005

Model-based exploration of the design space for heterogeneous systems on chip. / Blume, H.; Feldkaemper, H.; Noll, T.
In: Journal of VLSI Signal Processing Systems for Signal, Image, and Video Technology, 2005.

Research output: Contribution to journal › Article › Research › peer review

A multi-core SoC design for advanced image and video compression. / Dehnhardt, A.; Kulaczewski, M. B.; Friebe, L. et al.
2005 IEEE ICASSP '05 - Proc. : Design and Implementation of Signal Proces.Syst.,Indust. Technol. Track,Machine Learning for Signal Proces. Education, Spec. Sessions. Institute of Electrical and Electronics Engineers Inc., 2005. p. V665-V668 1416391 (ICASSP, IEEE International Conference on Acoustics, Speech and Signal Processing - Proceedings; Vol. V).

Research output: Chapter in book/report/conference proceeding › Conference contribution › Research › peer review

Net order optimization in analog net bundles. / Jambor, Thomas; Schreiner, L.; Olbrich, Markus et al.
In: Microtechnologies for New Millenium 2005, 2005.

Research output: Contribution to journal › Article › Research › peer review

A methodology for modeling lateral parasitic transistors in smart power ICs. / Oehmen, Joerg; Hedrich, Lars; Olbrich, Markus et al.
BMAS 2005 - Proceedings of the 2005 IEEE International Behavioral Modeling and Simulation Workshop. 2005. p. 19-24 1518181 (BMAS 2005 - Proceedings of the 2005 IEEE International Behavioral Modeling and Simulation Workshop; Vol. 2005).

Research output: Chapter in book/report/conference proceeding › Conference contribution › Research › peer review

Modeling substrate currents in smart power ICs. / Oehmen, Joerg; Olbrich, Markus; Barke, Erich.
In: Proceedings of the International Symposium on Power Semiconductor Devices and ICs, 2005, p. 127-130.

Research output: Contribution to journal › Conference article › Research › peer review

Detailed routing with integrated static timing analysis applying simulated annealing. / Panitz, Philipp; Olbrich, Markus; Barke, Erich.
3rd International IEEE Northeast Workshop on Circuits and Systems Conference, NEWCAS 2005. 2005. p. 387-390 1496696 (3rd International IEEE Northeast Workshop on Circuits and Systems Conference, NEWCAS 2005; Vol. 2005).

Research output: Chapter in book/report/conference proceeding › Conference contribution › Research › peer review

RAPANUI: Rapid prototyping for media processor architecture exploration. / Payá Vayá, Guillermo; Langerwerf, Javier Martín; Pirsch, Peter.
In: Lecture Notes in Computer Science, Vol. 3553, 2005, p. 32-40.

Research output: Contribution to journal › Conference article › Research › peer review

PARSY: A PARasitic SYmetric router for net bundles using module generators. / Schreiner, Lars; Olbrich, Markus; Barke, Erich et al.
2005 IEEE VLSI-TSA International Symposium on VLSI Design, Automation and Test,(VLSI-TSA-DAT). 2005. p. 71-74 1500023 (2005 IEEE VLSI-TSA International Symposium on VLSI Design, Automation and Test,(VLSI-TSA-DAT); Vol. 2005).

Research output: Chapter in book/report/conference proceeding › Conference contribution › Research › peer review

Routing of analog busses with parasitic symmetry. / Schreiner, Lars A.; Olbrich, Markus; Barke, Erich et al.
2005. 14-19.

Research output: Contribution to conference › Paper › Research › peer review

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