Design space exploration of media processors

A generic VLIW architecture and a parameterized scheduler

authored by: Guillermo Paya-Vaya, Javier Martín-Langerwerf, Piriya Taptimthong, Peter Pirsch
Abstract: This paper presents a new environment for exploring and optimizing VLIW architectures for multimedia applications. The environment consists of a generic VLIW architecture, in which virtually all characteristics can be changed, and an assembler with the corresponding parameterized scheduler based on an enhanced version of the list scheduling algorithm. A novel partitioned register file architecture is proposed and analyzed with this environment. This is performed using a highly time consuming task of the H.264 video decoder application. Performance improvements of up to 67% can be achieved when running this application on different architecture configurations.
Organisation(s): Institute of Microelectronic Systems
Type: Conference contribution
Pages: 254-267
No. of pages: 14
Publication date: 2007
Publication status: Published
Peer reviewed: Yes
ASJC Scopus subject areas: Theoretical Computer Science, General Computer Science
Electronic version(s): https://doi.org/10.1007/978-3-540-71270-1_19 (Access: Closed)