Application of global loops on ULSI routing for DfY

authored by

P. Panitz, M. Olbrich, J. Koehl, E. Barke

Abstract

The number of circuit malfunctions due to opens increases with shrinking technologies. This requires to reconsider traditional tree based routing approaches for signal wiring. In this paper, we apply global loops to generate robust net topologies which are fully immune against single open faults. We show that the solution of the travelling salesperson problem yields a nearly optimal solution to the two edge connected subgraph problem. Additionally, we introduce a heuristic for finding additional segments which significantly reduce the delay. As result the critical area reduction is better than in previous published approaches which augment minimum Steiner trees.

Organisation(s)

Institute of Microelectronic Systems

External Organisation(s)

IBM Deutschland Research & Development GmbH

Type

Conference contribution

Publication date

2006

Publication status

Published

Peer reviewed

Yes

ASJC Scopus subject areas

Electrical and Electronic Engineering

Electronic version(s)

https://doi.org/10.1109/icicdt.2006.220822 (Access: Unknown)