Application of global loops on ULSI routing for DfY

verfasst von

P. Panitz, M. Olbrich, J. Koehl, E. Barke

Abstract

The number of circuit malfunctions due to opens increases with shrinking technologies. This requires to reconsider traditional tree based routing approaches for signal wiring. In this paper, we apply global loops to generate robust net topologies which are fully immune against single open faults. We show that the solution of the travelling salesperson problem yields a nearly optimal solution to the two edge connected subgraph problem. Additionally, we introduce a heuristic for finding additional segments which significantly reduce the delay. As result the critical area reduction is better than in previous published approaches which augment minimum Steiner trees.

Organisationseinheit(en)

Institut für Mikroelektronische Systeme

Externe Organisation(en)

IBM

Typ

Aufsatz in Konferenzband

Publikationsdatum

2006

Publikationsstatus

Veröffentlicht

Peer-reviewed

Ja

ASJC Scopus Sachgebiete

Elektrotechnik und Elektronik

Elektronische Version(en)

https://doi.org/10.1109/icicdt.2006.220822 (Zugang: Unbekannt)