Hierarchical Verification of AMS Systems With Affine Arithmetic Decision Diagrams

verfasst von

Carna Zivkovic, Christoph Grimm, Markus Olbrich, Oliver Scharf, Erich Barke

Abstract

Formal methods are a promising alternative to simulation-based verification of mixed-signal systems. However, in practice, such methods fail to scale with heterogeneity and complexity of today's analog/mixed-signal systems. Furthermore, it is unclear how they can be integrated into existing verification flows. This paper shows a path to overcome these obstacles. The idea is to use a hierarchical verification flow, in which components can be verified by formal methods or by multirun simulation. To transport verification results across hierarchies, we represent parameters and properties by affine arithmetic decision diagrams. We study to which extent this approach fulfills the needs of practical application by the verification of a phase-locked loop of an IEEE 802.15.4 transceiver system.

Organisationseinheit(en)

Fachgebiet Mixed-Signal-Schaltungen

Externe Organisation(en)

Technische Universität Kaiserslautern

Typ

Artikel

Journal

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Band

38

Seiten

1785-1798

Anzahl der Seiten

14

Publikationsdatum

10.2019

Publikationsstatus

Veröffentlicht

Peer-reviewed

Ja

ASJC Scopus Sachgebiete

Software, Computergrafik und computergestütztes Design, Elektrotechnik und Elektronik

Elektronische Version(en)

https://doi.org/10.1109/tcad.2018.2864238 (Zugang: Geschlossen)