A high efficient simulation environment for HDTV video decoder in VLSI design

verfasst von

Xun Mao, Hui Wang, Huiming Gong, Wei Wang, Yanli He, Jian Lou, Lu Yu, Qindong Yao, Peter Pirsch

Abstract

With the increase of the complex of VLSI such as the SoC (System on Chip) of MPEG-2¹ Video decoder with HDTV scalability especially, simulation and verification of the full design, even as high as the behavior level in HDL, often proves to be very slow, costly and it is difficult to perform full verification until late in the design process. Therefore, they become bottleneck of the procedure of HDTV video decoder design, and influence it's time-to-market mostly, In this paper, the architecture of Hardware/Software Interface of HDTV video decoder is studied, and a Hardware-Software Mixed Simulation (HSMS) platform is proposed to check and correct error in the early design stage, based on the algorithm of MPEG-2 video decoding. The application of HSMS to target system could be achieved by employing several introduced approaches. Those approaches speed up the simulation and verification task without decreasing performance.

Organisationseinheit(en)

Institut für Mikroelektronische Systeme

Externe Organisation(en)

Zhejiang University (ZJU)

Typ

Artikel

Journal

Proceedings of SPIE - The International Society for Optical Engineering

Band

4671 II

Seiten

1006-1014

Anzahl der Seiten

9

ISSN

0277-786X

Publikationsdatum

04.01.2002

Publikationsstatus

Veröffentlicht

Peer-reviewed

Ja

ASJC Scopus Sachgebiete

Elektronische, optische und magnetische Materialien, Physik der kondensierten Materie, Angewandte Informatik, Angewandte Mathematik, Elektrotechnik und Elektronik

Elektronische Version(en)

https://doi.org/10.1117/12.453023 (Zugang: Geschlossen)