Design and analysis of matching circuit architectures for a closest match lookup

verfasst von: F. Kupzog, Kieran McLaughlin, Sakir Sezer, Holger Blume, Tobias Noll, John McCanny
Abstract: The massive growth in the use of Internet and the development of new real-time applications has put considerable strain on the techniques currently used for the lookup and retrieval of information essential for classification, routing, Quality of Service (QoS) and Internet security. This paper investigates the design and implementation of a number of closest value lookup circuits, suitable for deployment in a range of networking applications. Detailed descriptions of a number of matching circuit architectures are given and the results of hardware implementations for the Altera Stratix II FPGA are discussed and evaluated.
Externe Organisation(en): Rheinisch-Westfälische Technische Hochschule Aachen (RWTH)
Queen's University Belfast
Typ: Aufsatz in Konferenzband
Anzahl der Seiten: 1
Publikationsdatum: 03.04.2006
Publikationsstatus: Veröffentlicht
Peer-reviewed: Ja
ASJC Scopus Sachgebiete: Allgemeiner Maschinenbau
Elektronische Version(en): https://doi.org/10.1109/AICT-ICIW.2006.76 (Zugang: Geschlossen)
http://www.cecs.uci.edu/~papers/ipdps06/pdfs/71-RAW-paper-1.pdf (Zugang: Offen)