Multi-Level Prototyping of a Vertical Vector AI Processing System

verfasst von

Frederik Kautz, Sven Gesper, Gia Bao Thieu, Hans Martin Bluethgen, Holger Blume, Guillermo Paya-Vaya

Abstract

Modern embedded systems must be designed carefully to cope with the complexity and real-time requirements of modern AI (Artificial Intelligence) driven automotive applications, such as Advanced Driver-Assistance Systems (ADAS). Despite increasing complexity, the time to market is decreasing. In this work, a SystemC-based Virtual Prototype of a neural network processing platform is exploited to bypass the limitations of standalone instruction set simulators (ISS) and FPGA prototyping. The processing platform under test is based on a novel massive parallel vector processor architecture coupled with a RISC- V control core that runs widely used convolutional neural networks (CNNs) for object detection. The paper discusses the variations and appropriateness of the three prototyping methods outlined, demonstrating how the Virtual Prototype can address the aforementioned constraints, resulting in a 2.07x increase in accuracy, 16x greater configurations, and more profound insights into the system compared to standalone and FPGA prototyping.

Organisationseinheit(en)

Institut für Mikroelektronische Systeme

Externe Organisation(en)

Cadence Design Systems
Technische Universität Braunschweig

Typ

Aufsatz in Konferenzband

Seiten

1-2

Anzahl der Seiten

2

Publikationsdatum

2024

Publikationsstatus

Veröffentlicht

Peer-reviewed

Ja

ASJC Scopus Sachgebiete

Hardware und Architektur, Computernetzwerke und -kommunikation

Elektronische Version(en)

https://doi.org/10.1109/asap61560.2024.00011 (Zugang: Geschlossen)