A Power Estimation Model for an FPGA-Based Softcore Processor

verfasst von

Peter Zipf, Heiko Hinkelmann, Lei Deng, Manfred Glesner, Holger Blume, Tobias G. Noll

Abstract

We describe the application of a hybrid functional level power analysis (FLPA) and instruction level power analysis (ILPA) approach to a processor model implemented on an FPGA. This technique enables the estimation of the task specific power consumption of the modeled processor, in our case a LEON2, very early during a system design flow, based on the software which will run on it. The FLPA/ILPA model used during our work as well as the test scenarios and the measured results are described. Later, the function block separation and the power consumption modeling are discussed. Finally, the model is validated by benchmarking. The obtained model is promising in the sense that a) its estimations are close (4 % on average) to the measured data, and b) the model structure is similar to that of hardcore processors which is not a trivial result.

Externe Organisation(en)

Technische Universität Darmstadt
Rheinisch-Westfälische Technische Hochschule Aachen (RWTH)

Typ

Aufsatz in Konferenzband

Seiten

171-176

Anzahl der Seiten

6

Publikationsdatum

12.11.2007

Publikationsstatus

Veröffentlicht

Peer-reviewed

Ja

ASJC Scopus Sachgebiete

Angewandte Informatik, Elektrotechnik und Elektronik

Elektronische Version(en)

https://doi.org/10.1109/FPL.2007.4380643 (Zugang: Geschlossen)