Hardware-Abbildung eines videobasierten Verfahrens zur echtzeitfähigen Auswertung von Winkelhistogrammen auf eine modulare Coprozessor-Architektur
- verfasst von
- H. Flatt, A. Tarnowsky, H. Blume, P. Pirsch
- Abstract
This paper presents the mapping of a video-based approach for real-time evaluation of angular histograms on a modular coprocessor architecture. The architecture comprises several dedicated processing elements for parallel processing of computation-intensive image processing tasks and is coupled with a RISC processor. A configurable architecture extension, especially a processing element for evaluating angular histograms of objects in conjunction with a RISC processor, provides a real-time classification. Depending on the configuration of the architecture extension, 3 300 to 12 000 look-up tables are required for a Xilinx Virtex-5 FPGA implementation. Running at a clock frequency of 100 MHz and independently of the image resolution per frame, 100 objects of size 256 × 256 pixels are analyzed in a 25 Hz video stream by the architecture.
- Organisationseinheit(en)
-
Institut für Mikroelektronische Systeme
- Typ
- Artikel
- Journal
- Advances in Radio Science
- Band
- 8
- Seiten
- 135-142
- Anzahl der Seiten
- 8
- ISSN
- 1684-9965
- Publikationsdatum
- 01.10.2010
- Publikationsstatus
- Veröffentlicht
- Peer-reviewed
- Ja
- ASJC Scopus Sachgebiete
- Elektrotechnik und Elektronik
- Elektronische Version(en)
-
https://doi.org/10.5194/ars-8-135-2010 (Zugang:
Offen)
https://doi.org/10.15488/1424 (Zugang: Offen)
