Instruction merging to increase parallelism in VLIW architectures

verfasst von

Guillermo Payá-Vayá, Javier Martín-Langerwerf, Florian Giesemann, Holger Blume, Peter Pirsch

Abstract

This paper describes a new mechanism for concurrent use of more functional units, without increasing the control path of a generic VLIW architecture. The proposed approach only requires small modifications in the architecture and a new code selection function in the instruction scheduler. The key idea of this approach is to search for similar independent operations inside a basic assembler code block and merge them in a single instruction, which executes the same operation with even and odd operand registers in two different functional units. A comprehensive evaluation of this mechanism with two multimedia tasks shows an improvement of the dynamic instructions-per-cycle, exceeding the theoretical maximum of the reference architecture.

Organisationseinheit(en)

Institut für Mikroelektronische Systeme

Typ

Aufsatz in Konferenzband

Seiten

143-146

Anzahl der Seiten

4

Publikationsdatum

13.11.2009

Publikationsstatus

Veröffentlicht

Peer-reviewed

Ja

ASJC Scopus Sachgebiete

Hardware und Architektur, Steuerungs- und Systemtechnik, Elektrotechnik und Elektronik

Elektronische Version(en)

https://doi.org/10.1109/SOCC.2009.5335660 (Zugang: Geschlossen)