This course is held in
It is designed for students in the master's program.
Students learn about advanced processor architecture (instruction-, data-, and task-level parallelism). They are taught how application-specific instruction set processors (ASIPs) are implemented. Following the course, you will be able to conceptualize arithmetic-oriented hardware extensions. Furthermore, you will learn about novel development trends of processors, such as highly parallel processors and reconfigurable processors.
1. Introduction to Embedded Computer Architectures
2. Fundamentals of Computer Architecture
3. Application-Specific Instruction-Set Processor (ASIP)
4. Instruction-Level Parallelism
5. Data-Level Parallelism
6. Memory Systems
7. Heterogeneous / Homogeneous Multi-Core Systems
8. Reconfigurable ASIP Architectures (rASIP)
Oral, duration 30 min, no documents allowed. An official photo ID and a student ID must be brought to the oral examination. Examination dates by arrangement.
Further information about this module can be found in the online course catalog and in Stud.IP. In addition, you must register your participation in this course in Stud.IP.
Lecture and exercise material can be found under the respective course in Stud.IP.