This practical course is taught in
Contents
The laboratory teaches the concepts and architectures of specialized processors, the underlying theoretical approaches as well as the acceleration of systems through architecture adaptation using the Cadence LX7 processor as an example.
Upon successful completion of the module, students will be able to,
- understand and apply the concept of application-specific processors
- specialize a basic processor architecture for an example application in the field of driver assistance systems
- evaluate and assess the architecture for different optimization goals (e.g., maximum computing power or minimum power dissipation).
The learning objectives here are:
- Architectural principles of processors and their specialization capabilities.
- Definitions of application-specific instruction set processors such as those of the LX7 processor architecture and their extension possibilities.
- Novel instruction set extensions using the Cadence Xtensa Xplorer and the Cadence LX7 processor, respectively.
- Hardware description language "Tensilica Instruction Extension
- Verification and emulation of processor architectures
Registration
Laboratory places are allocated via the central laboratory registration system of the Faculty of Electrical Engineering and Computer Science. Students of all faculties have to register for the lab via this system. A group allocation takes place in the introductory event. In addition, you must register your participation in this event in the Stud.IP course of this lab.
Resources
The distribution of the lab reprint will take place in the introductory lecture. Further information and documents for this module can be found in the online course catalog and Stud.IP.
Location
The lab will be held in the IMS, 3rd floor TI building, room 326.
Introduction Seminar
The first Seminar is held on April 10th 2024 at 9:00 am. Participation at all seminar dates including the introduction and closing seminars is mandatory.