Multi-Level Prototyping of a Vertical Vector AI Processing System

authored by

Frederik Kautz, Sven Gesper, Gia Bao Thieu, Hans Martin Bluethgen, Holger Blume, Guillermo Paya-Vaya

Abstract

Modern embedded systems must be designed carefully to cope with the complexity and real-time requirements of modern AI (Artificial Intelligence) driven automotive applications, such as Advanced Driver-Assistance Systems (ADAS). Despite increasing complexity, the time to market is decreasing. In this work, a SystemC-based Virtual Prototype of a neural network processing platform is exploited to bypass the limitations of standalone instruction set simulators (ISS) and FPGA prototyping. The processing platform under test is based on a novel massive parallel vector processor architecture coupled with a RISC- V control core that runs widely used convolutional neural networks (CNNs) for object detection. The paper discusses the variations and appropriateness of the three prototyping methods outlined, demonstrating how the Virtual Prototype can address the aforementioned constraints, resulting in a 2.07x increase in accuracy, 16x greater configurations, and more profound insights into the system compared to standalone and FPGA prototyping.

Organisation(s)

Institute of Microelectronic Systems

External Organisation(s)

Cadence Design Systems
Technische Universität Braunschweig

Type

Conference contribution

Pages

1-2

No. of pages

2

Publication date

2024

Publication status

Published

Peer reviewed

Yes

ASJC Scopus subject areas

Hardware and Architecture, Computer Networks and Communications

Electronic version(s)

https://doi.org/10.1109/ASAP61560.2024.00011 (Access: Unknown)