A 30 ns 16 Mb 2 b/cell Embedded Flash with Ramped Gate Time-Domain Sensing Scheme for Automotive Application

authored by

Sebastian Kiesel, Thomas Kern, Bernhard Wicht, Helmut Graeb

Abstract

The growing application scope of non-volatile memory based microcontrollers leads to increased memory capacity requirements. Scaling issues of established flash technologies impede further increase of memory density. Emerging technologies still suffer from a lack of robustness for automotive application. This paper presents the first embedded multi-level cell flash memory macro for automotive application manufactured in 28 nm technology. It employs a robust time-domain voltage sensing scheme with ramped gate cell biasing to achieve low latency combined with increased fault tolerance. Measurement results show widened time-domain read windows when applying dynamic voltage ramps to the word lines. The 16 Mb memory features 30 ns random access time at temperatures up to 175 °C with 2b/cell operation. Retention bit error rates below 80 ppm are achieved after 1 k programming and erasing cycles.

Organisation(s)

Mixed-Signal Circuits Section

External Organisation(s)

Technical University of Munich (TUM)
Infineon Technologies AG

Type

Conference contribution

Pages

1-4

Publication date

04.2019

Publication status

Published

Peer reviewed

Yes

ASJC Scopus subject areas

Electrical and Electronic Engineering, Safety, Risk, Reliability and Quality, Instrumentation, Computer Networks and Communications, Hardware and Architecture

Electronic version(s)

https://doi.org/10.1109/vlsi-dat.2019.8741536 (Access: Closed)