Simulation investigations for the comparison of standard and highly robust AlCu thick metal tracks

authored by: Raj Sekar Sethu, Verena Hein, Marco Erstling, Kirsten Weide-Zaage
Abstract: The metal layout design influences the reliability of the metallization in semiconductor products. An optimized design of the interconnect stack can help to reduce the incidence of dielectric and passivation cracking during Joule heating of the metallization in semiconductor back end of line (BEOL) structures. The elements of the metal stack have different material properties. Thermal stress from Joule heating can cause mismatch in thermal expansion between the materials. This can lead to high stress gradients. The paper shows the comparison of the standard design versus the Highly Robust (HiRo) metallization layout. The evaluation is done for an AlCu metallization with W-plugs in a 180 nm technology node with a metal stack with thick metal (∼3 μm thick) on top. The simulation results show better protection against thermal stress caused by Joule heating for the HiRo-layout.
Organisation(s): Institute of Microelectronic Systems
External Organisation(s): X-FAB Silicon Foundries SE
Type: Conference contribution
Publication date: 10.05.2017
Publication status: Published
Peer reviewed: Yes
ASJC Scopus subject areas: Mechanical Engineering, Mechanics of Materials, Electrical and Electronic Engineering, Modelling and Simulation, Numerical Analysis, Safety, Risk, Reliability and Quality
Electronic version(s): https://doi.org/10.1109/eurosime.2017.7926226 (Access: Closed)