A Runtime-Reconfigurable Operand Masking Technique for Energy-Efficient Approximate Processor Architectures
- authored by
- M. Weißbrich, A. García-Ortiz, G. Payá-Vayá
- Abstract
In this paper, an operand masking approach is proposed to achieve lower energy consumption using approximate computing techniques in programmable high-performance processors, in this case horizontal and vertical SIMD vector processors for embedded computer vision applications. Contrary to state-of-the-art dedicated approximate arithmetic circuits, this mechanism enables programmable fine-grained accuracy control and switching energy reduction at runtime. An evaluation for a 45 nm ASIC technology shows a total effective energy reduction of up to 4.5% for a horizontal SIMD vector processor architecture executing approximate SIFT image feature extraction for an error-resilient egomotion estimation algorithm.
- Organisation(s)
-
Architectures and Systems Section
- Type
- Conference contribution
- Pages
- 1-6
- No. of pages
- 6
- Publication date
- 2020
- Publication status
- Published
- Peer reviewed
- Yes
- ASJC Scopus subject areas
- Computer Networks and Communications, Hardware and Architecture, Energy Engineering and Power Technology, Electrical and Electronic Engineering, Safety, Risk, Reliability and Quality, Control and Optimization
- Sustainable Development Goals
- SDG 7 - Affordable and Clean Energy
- Electronic version(s)
-
https://doi.org/10.1109/mocast49295.2020.9200278 (Access:
Closed)