Modeling substrate currents in smart power ICs

authored by

Joerg Oehmen, Markus Olbrich, Erich Barke

Abstract

Switching of power stages in smart power ICs, which drive an inductive load, turns on parasitic bipolar transistors and inject minority carriers into the substrate, which can affect the functionality of the chip. We present a new parasitic transistor model for post layout simulation, which accounts for a strongly inhomogeneous current flow, a base width of up to a few hundred μm, multiple base contacts and collectors, and whose parameters are easily extractable from layout and technology data.

Organisation(s)

Institute of Microelectronic Systems

Type

Conference article

Journal

Proceedings of the International Symposium on Power Semiconductor Devices and ICs

Pages

127-130

No. of pages

4

ISSN

1063-6854

Publication date

2005

Publication status

Published

Peer reviewed

Yes

ASJC Scopus subject areas

General Engineering