Simulation of time depending void formation in copper, aluminum and tungsten plugged via structures

authored by: David Dalleau, Kirsten Weide-Zaage, Yves Danto
Abstract: The investigation of degradation phenomena in chip-level metallization structures due to high current densities has been an important challenge since several years. Current densities above IMA/cm² induce high temperature and temperature gradients as well as high thermo-mechanical stress in the metallization. In addition to this, the formation of voids as well as hillocks appear, due to diffusion induced matter migration, driven by the electrical field, thermal gradients and thermal induced hydrostatic stress gradients. The evaluation of the reliability of metallization structures against metal migration is usually done by accelerated stress tests. A support in failure prediction is possible by finite-element simulations. In this paper, 3-D simulations of void formation in different via structures running under high current densities is presented. The void formation in an aluminum, copper and tungsten plug via structure are compared. The reliability of these different technologies are evaluated by simulation, and the corresponding time-depending results of void formation are presented and analysed. The TTF as well as the increasing electrical resistance of the structures during degradation simulation has been determined.
Organisation(s): Laboratorium f. Informationstechnologie
External Organisation(s): IXL Laboratory
Type: Conference article
Journal: Microelectronics reliability
Volume: 43
Pages: 1821-1826
No. of pages: 6
ISSN: 0026-2714
Publication date: 09.2003
Publication status: Published
Peer reviewed: Yes
ASJC Scopus subject areas: Electronic, Optical and Magnetic Materials, Atomic and Molecular Physics, and Optics, Safety, Risk, Reliability and Quality, Condensed Matter Physics, Surfaces, Coatings and Films, Electrical and Electronic Engineering
Electronic version(s): https://doi.org/10.1016/S0026-2714(03)00310-X (Access: Unknown)